ISO USB FT4232H CCB

MBSTech Universal Isolated USB Communication Control Board
Revision: Rev00a
Author: Andy Carpenter — MBSTech

1. Overview

The ISO USB FT4232H CCB (Communication Control Board) is a high-integrity, galvanically-isolated USB-to-multiprotocol interface designed for safe use with high-voltage and electrically noisy systems such as:

Power-conversion controllers (LLC, motor control, inverters)

FPGA and MCU development platforms

Industrial / EV / aerospace debugging systems

Long-cable, high-EMI environments

It provides four independent communication channels using the FT4232H, including:

FPGA JTAG

High-speed SPI

Dual UART interfaces

Custom synchronous/parallel structures via MPSSE

The system is fully USB 2.0 compatible and uses certified isolation components to provide robust protection between the host PC and the Unit Under Test (UUT).

2. Key Features

Galvanically isolated USB 2.0 (480 Mbps)

FT4232H Quad-channel USB bridge

Isochronous & MPSSE support

Isolated 5V rail using UCC33420-Q1

3.3V buck rail using TPSM82843

1.8V LDO rail using TLV75718

USB ESD protection (USBLC6-2SC6)

Soft-start input current limiting (TPS22917)

On-board EEPROM for FTDI configuration (93LC56)

Isolation is achieved via:

ISOUSB211-Q1 – Galvanically isolated USB repeater

UCC33420-Q1 – Isolated DC-DC power module

Primary and secondary grounds are fully separated:

Primary domain: 0V_USB

Secondary domain: 0V

This design prevents:

Ground loops

ESD damage

Common-mode noise coupling

High-voltage transient propagation

3. Power Architecture
USB VBUS → TPS22917 (soft-start) → PUSB_SOFT
          → UCC33420 (isolated) → P5V
          → TPSM82843 → P3V3
          → TLV75718 → V1P8


Bulk capacitance is placed only after the soft-start switch to limit inrush current.

Approximate available isolated output:
5 V @ 250 mA (1.25 W nominal)

4. Communication Interfaces
Function	Method	Notes
JTAG	MPSSE	FPGA programming/debug
SPI	MPSSE	High speed serial
UART 0	Independent	Up to 12 Mbps
UART 1	Independent	Up to 12 Mbps

Series termination resistors are intentionally omitted due to short interconnect lengths between the FT4232H and FPGA/UUT.

5. Supplied Files

This release contains:

iso usb_ft4323_ccb.docx — Engineering design report

iso_usb_ft4232_ccb.pdf — Full schematic export

iso_usb_ft4232_ccb.SchDoc — Altium schematic source

iso_usb_ft4232_ccb.IntLib — Integrated component library

README.txt — This document

6. License

This design is released under the:

CERN Open Hardware Licence Version 2 – Strongly Reciprocal
(CERN-OHL-S v2)

You are allowed to:

Use
Study
Modify
Build
Manufacture
Sell
provided that:

Attribution is preserved
Andy Carpenter — MBSTech

All derivative works remain under CERN-OHL-S v2

Any modifications are disclosed

This work is provided “as is” with no warranty of any kind.

SPDX-License-Identifier: CERN-OHL-S-2.0

CERN is referenced solely as the licence steward and does not endorse or contribute to this design.

7. Author

Andy Carpenter — MBSTech
Universal ISO FT4232H CCB
Revision 00a – 22/11/2025